In the imaging, lighting, display and electronics industries, it is predicted that in order to meet consumer demands, and fuelled by industry competitiveness, electronics products will be required to be increasingly durable, thin, lightweight and of low cost. In a growing market where consumers are demanding more from portable electronic devices and displays such as mobile phones, laptop computers, etc., flexible displays and electronics have the potential to eliminate the rigid constraints of traditional flat panel displays and electronics products. The goal in displays and electronics is to produce thin, lightweight, flexible devices and displays with achievable power requirements at a minimal cost.
Traditionally electronic devices requiring multiple layers of circuits have been fabricated using multiple circuit boards, with circuitry formed on one or both sides thereof, which may be bonded together and connected to one another by drilling holes (or vias) in the circuit boards which are filled with conductive material. To make such multiple layer circuit boards, a copper coated insulating board made of a composite material is treated with a light-sensitive material, known as a photoresist, which is imaged with the pattern of the desired electronic circuit, typically by exposing the photoresist through a photomask. The resist is affected by the exposure such that the exposed and non-exposed parts can be differentiated in terms of ease or method of removal. The imaged resist is then treated to remove the resist in an image-wise manner to reveal bare copper. The bared copper is then etched away and then the remaining resist removed to reveal a copper track on the insulating board. A second board may be made in a similar way with its own circuit pattern and the two boards bonded together and optionally connected by drilling vias as mentioned above.
The process of making electronic circuit boards such as this can be quite laborious and involves several sequential steps.
Furthermore, using this method it is difficult to produce fine conductive tracks (e.g. less than 25 μm) on a printed circuit board, as the photoresist tends to delaminate and the UV source has to be highly collimated and scatter and reflections from the copper surface somehow minimised.
It is desirable to provide a solution to improve the efficiency of the electronic circuit manufacturing process and to enable electronic circuits, preferably with very small track widths, to be generated on flexible supports to meet the predicted growth in demand for flexible circuits and flexible and thin devices. A number of attempts to provide new manners of manufacturing electronic circuits have been previously disclosed, but the processes are often lengthy and laborious.
U.S. Pat. No. 2,854,386 relates to a method of photographically printing conductive metal patterns. As described therein, a thin layer of a photographic silver halide emulsion coated onto a support is exposed according to a desired pattern through a master transparency to generate a latent image which forms a dense and visible silver image upon development, preferably with a high contrast, non-fogging developer. The visible silver image formed is a negative of the final desired pattern. An oxidising etch solution is then applied which oxidises the metallic silver and simultaneously softens the associated gelatin thereby removing the gelatin from the support to leave a residual gelatin image. A latent silver image is formed in the residual gelatin image by re-exposing the whole support to actinic radiation and the silver nuclei act as seeds in the subsequent physical development step to form a heavy continuous conductive silver deposit. The resulting conductive silver pattern may be plated with copper or other metal according to standard electroplating techniques. In a second described embodiment, the emulsion is of a wash-off type emulsion comprising unhardened gelatin and a light sensitive tanning agent. The emulsion layer is exposed according to the desired pattern and non-pattern areas of gelatin removed by a wash-off developer to form a gelatin image of the desired pattern. A preliminary silver image is formed in the gelatin image by treating it with an alkaline solution and a silver salt, such as silver nitrate, whereby silver oxide particles are formed in the gelatin image, which then form the nuclei for forming a silver deposit via a physical development process and may optionally be electroplated with copper or other metal.
U.S. Pat. No. 6,706,165 describes a way of making metallic structures, which are presumably conducting by forming a silver image which is then grown in an electroless-plating bath to make it conductive and then electroplating this grown image to form the conducting metal structure. This process is relatively laborious and complicated. GB-A-0585035 describes a process for making conducting tracks, including an electroless plating process, which may or may not be followed by an electroplating step.
U.S. Pat. No. 3,647,456 relates to a method of making electrically conductive silver images with the object of providing such electrically conductive silver images having high spatial resolution, which conducting silver image may be advantageously utilised in printed circuit techniques thereby eliminating the need for an aluminium layer in photoresists and establishing a silver pattern directly upon a wafer. There is described the use of a coating of silver bromide emulsion comprising cadmium iodide on a substrate to produce a latent image on the substrate, developing the latent image using a high resolution developer to provide a silver image and heating the silver image at a temperature of from 200° C. to 450° C. to render the silver image electrically conductive.
U.S. Pat. No. 3,223,525 describes a method of manufacturing, by photographic means, external electrically conductive noble-metal patterns on non-conductive supports. In the described method, a non-conductive support is treated with a light sensitive compound such as silver halide, exposed to light to produce a silver or mercury germ image, which is then treated with a stabilised physical developer for a prolonged period of time whereby the internal image is made to grow out beyond the surface of the support to be come an external image having resistance of less than 104 ohms per square.
One problem is that, for example, in the method of U.S. Pat. No. 3,223,525, the physical development process is slow and methods of speeding up the process, such as increasing the concentration of the development solution or raising the temperature may cause increased background deposition thereby increasing the likelihood of short circuits occurring.
The various alternative methods of generating conductive circuit patterns illustrated in the above-referenced documents each have advantages as described therein, but do not provide a more efficient and improved method of manufacturing conductive tracks.